1. Field of the Invention
The present invention relates generally to techniques for controlling the resistance of on-chip MOSFET resistors, and specifically to those techniques using a resistor, such as an external accurate resistor, to control the on-chip resistance of MOSFET resistors.
2. Prior Art
In many applications, for example MOSFET-C filters, there is a known need for precision resistors in order to obtain the necessary parameters for a specific circuit. However, achieving such accuracy for on-chip resistors is complex due to relatively high variability of the manufacturing process, as well as environmental impacts, such as temperature. Prior art technologies for precision resistors include technologies such as trimming, including LASER based trimming, use of specialty manufacturing processes, or simulation of a resistor using a metal oxide semiconductor (MOS) device. While the use of a single MOS device may provide highly non-linear results, one solution suggested in the prior art is the use of an impedance element made up of two N-type MOS (NMOS) devices in such a way that such nonlinearities cancel out.
Another possibility is to use the circuit shown in FIG. 1. The circuit is a bridge that uses a grounded external resistor (REXT) 130. The circuit tunes the resistance of field effect transistor (FET) 150, which operates in the triode region. The gate voltage supplied to FET 150 is also applied to the gates of a filter's MOSFETs, for example a MOSFET-C filter (not shown). VREF is the reference voltage used in the filter, which is the quiescent value of the source and drain voltages of the MOSFETs in the filter, e.g. 2V. A feedback loop is applied by operational amplifier 140 and FET 150 so that the voltage on both positive and negative inputs of operational amplifier 140 are identical, noting that these inputs also represent a high input impedance. As a result:
            R      SD              R      EXT        =            R      1              R      2      where R1 is resistor 110 and R2 is resistor 120, and where RSD is:
      R    SD    =            V      SD              I      S      
A person skilled in the art would note that VSD and IS are used because they are positive quantities for the PMOS FET 150. One would further note that:
      V    SD    =            V      REF        ⁢                  R        1                              R          1                +                  R          2                    
By choosing R1/R2 ratio to be much smaller than 1, the voltage across FET 150 can be made much smaller than VREF. This enables the operation of FET 150 in the deep triode zone. Assuming now that R1/R2=1/19, the voltage VSD shall be 0.1V. Using a FET 150 having, for example, a width of 7 microns and a length of 1 micron, then in order to achieve a resistance of 6 KOhm for RSD of FET 150, the value of REXT 130 should be at 114 KOhm. Simulations using a gain of 1000 for operational amplifier 140 will confirm the values, and RSD is found to be 5.99 KOhm. However, when the resulting bias values of FET 150 are used to calculate its small-signal drain-source resistance at VSD=0, a value of about 5.4 KOhm is found. This problem is the result of the relationship between IS and VSD as is evident from the curvature of IS vs. VSD in the triode region, as the large-signal resistance of FET 150 is not constant. Therefore at VSD=0.1V, the resistance is 6 KOhm, while at VSD close to 0, the resistance of FET 140 decreases by about 10%. This makes the accuracy of the tuning very poor, since it is the small-signal resistance at VSD=0 that is the relevant parameter in linearized MOSFET-C filter integrators.
It is noteworthy that it may be tempting to compensate for the above problem by increasing the value of VSD/IS to which system 100 settles, so that the small-signal resistance at VSD=0 becomes 6 KOhm as desired. However, this solution does not work since such adjustment must be based on accurate modeling in the triode region, which may not be readily available. Further, even if modeling was accurate, the adjustment would only work at one set of parameters and one temperature, providing a very limited range of reasonable operation. As the parameters change, for example due to temperature changes, a variation of 10% between the extremes may be caused, rendering the solution impractical.
Another way to bypass the above problems is by decreasing the value used for VSD so that it is closer to 0. However, reduction of VSD makes circuit 100 very sensitive to operational amplifier 140 equivalent input offset voltage. A person skilled in the art could easily verify this using simulations or test chips.
Due to the limitations of prior art solutions, it would be advantageous to provide a solution for a precision resistor comprised of a FET device with an ability to precisely control its resistance. It would be further advantageous if a single pin can be used to determine such value externally of an integrated circuit.